On 03/07/2017 08:00 AM, Paolo Bonzini wrote:
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
This is similar to the patch that I saw go by for MIPS.
I hadn't noticed any problems caused by this lack of locking. This may
be because interrupts cannot be delivered while in PALmode while these
registers are being manipulated. However, it's always better to obey
the rules, right?
This should not be necessary, clocks and timers are thread-safe. Time
to make a list of the few things that are, I guess.
There are issues if data is accessed by device models and CPU out of
the lock, but everything seems fine for typhoon_alarm_timer.
This isn't typhoon_alarm_timer, but the move-to-special-register instruction on
the cpu side.
But I guess I misunderstood the problem that was happening for MIPS.
If nothing needs changing for Alpha, that's great.
r~
