On 04/06/2017 02:01 PM, Benjamin Herrenschmidt wrote: > On Thu, 2017-04-06 at 13:50 +0200, Cédric Le Goater wrote: >> >> So, looking at hostboot, the lower level firmware, I think the >> initial >> patch is more in sync with it : >> >> https://github.com/open-power/hostboot/blob/master-p8/src/usr/devt >> ree/bld_devtree.C#L1038 >> >> David, can we keep it as it is ? I will change the commit log which >> is a bit fuzzy. > > Note that OPAL should be happy to have multiple LPCs in the DT as long > as one of them has the "primary" property in the node to tell it that's > where the UART etc... are.
yes, that works also : [ 0.024439731,5] LPC: LPC[000]: Initialized, access via XSCOM @0xb0020 [ 0.024499074,5] LPC: LPC[001]: Initialized, access via XSCOM @0xb0020 [ 0.024517962,5] LPC: LPC: Default bus on chip 0x0 but real HW (2 sockets OpenPOWER systems, garrison and firestone) does not expose the LPC bus on the second chip, should we do so in qemu ? Thanks, C.
