From: Joseph Myers <jos...@codesourcery.com>
When emulating various SSE4.1 instructions such as pinsrd, the address
of a memory operand is computed without allowing for the 8-bit
immediate operand located after the memory operand, meaning that the
memory operand uses the wrong address in the case where it is
rip-relative. This patch adds the required rip_offset setting for
those instructions, so fixing some GCC test failures (13 in the gcc
testsuite in my GCC 6-based testing) when testing with a default CPU
setting enabling those instructions.
Signed-off-by: Joseph Myers <jos...@codesourcery.com>
Message-Id: <alpine.deb.2.20.1708080041391.28...@digraph.polyomino.org.uk>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
---
target/i386/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index cab9e32f91..5fdadf98cf 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -4080,6 +4080,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
if (sse_fn_eppi == SSE_SPECIAL) {
ot = mo_64_32(s->dflag);
rm = (modrm & 7) | REX_B(s);
+ s->rip_offset = 1;
if (mod != 3)
gen_lea_modrm(env, s, modrm);
reg = ((modrm >> 3) & 7) | rex_r;
--
2.13.3
