On Thu, Nov 25, 2010 at 08:07:39AM +0100, Alexander Graf wrote:
> +static int pci_ahci_init(PCIDevice *dev)
> +{
> + struct AHCIPCIState *d;
> + d = DO_UPCAST(struct AHCIPCIState, card, dev);
> +
> + pci_config_set_vendor_id(d->card.config, PCI_VENDOR_ID_INTEL);
> + pci_config_set_device_id(d->card.config,
> + PCI_DEVICE_ID_INTEL_ICH7_AHCI_RAID);
> + d->card.config[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
> + PCI_COMMAND_MASTER;
command register is 16bit width. So please use pci_set_word().
> + pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA);
> + pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1);
> +
> + d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */
> + d->card.config[PCI_LATENCY_TIMER] = 0x00; /* Latency timer */
> + d->card.config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
Please don't overwrite multifunction bit. Just drop this line, then
pci generic layer will take care of it.
> + pci_config_set_interrupt_pin(d->card.config, 1);
> +
> + qemu_register_reset(ahci_reset, d);
> +
> + /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now
> */
> + pci_register_bar(&d->card, 5, 0x1000, PCI_BASE_ADDRESS_SPACE_MEMORY,
> + ahci_pci_map);
> +
> + msi_init(dev, 0x50, 1, true, false);
> +
> + ahci_init(&d->ahci, &dev->qdev);
> + d->ahci.irq = d->card.irq[0];
> +
> + return 0;
> +}
--
yamahata
