On 09/05/2017 08:53 AM, Peter Maydell wrote: > Define a new MachineClass field ignore_memory_transaction_failures. > If this is flag is true then the CPU will ignore memory transaction > failures which should cause the CPU to take an exception due to an > access to an unassigned physical address; the transaction will > instead return zero (for a read) or be ignored (for a write). This > should be set only by legacy board models which rely on the old > RAZ/WI behaviour for handling devices that QEMU does not yet model. > New board models should instead use "unimplemented-device" for all > memory ranges where the guest will attempt to probe for a device that > QEMU doesn't implement and a stub device is required. > > We need this for ARM boards, where we're about to implement support for > generating external aborts on memory transaction failures. Too many > of our legacy board models rely on the RAZ/WI behaviour and we > would break currently working guests when their "probe for device" > code provoked an external abort rather than a RAZ. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > include/hw/boards.h | 11 +++++++++++ > include/qom/cpu.h | 7 ++++++- > qom/cpu.c | 16 ++++++++++++++++ > 3 files changed, 33 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
