On 5 September 2017 at 17:48, Richard Henderson <richard.hender...@linaro.org> wrote: > On 09/05/2017 09:26 AM, Peter Maydell wrote: >> We don't map the hole. The container is 0x21000 in size, the normal >> nvic_sysregs region is 0x1000 at offset 0x0 (which will be 0xe000e000 >> in the system address space), and the NS alias region >> is 0x1000 at offset 0x20000 (0xe002e000 in the system address space). >> There's nothing mapped in the hole in the container, so accesses >> there will busfault, as they will for other PPB accesses before or >> after the SCSes. > > Ok, it's not wrong, but I still don't understand the need for the container.
It lets us assemble all the parts of this bit of the address space -- SCS, systick (which sits on top of some of the SCS), NS SCS -- in the right place, rather than requiring any caller that wants to instantiate an NVIC to do it (and to check whether the cpu has the security extension to figure out whether the NS alias exists, and so on). Now that we've QOMified hw/arm/armv7m.c it's less important that the NVIC in particular does that, and it's partly historical legacy that most of this is done in the NVIC realize function rather than in armv7m_instance_init() (we used to implement systick directly in the NVIC source file rather than as its own device). It doesn't seem worth shuffling the code around now, though (the container already existed prior to this patch, we're just making it a bit bigger and adding another thing to it.) thanks -- PMM
