On Mon, Sep 11, 2017 at 6:52 AM, Peter Maydell <peter.mayd...@linaro.org> wrote:
> For a bus fault, the M profile BFSR bit PRECISERR means a bus
> fault on a data access, and IBUSERR means a bus fault on an
> instruction access. We had these the wrong way around; fix this.
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com>
Thanks,
Alistair
> ---
> target/arm/helper.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 668e367..1741e0d 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6430,15 +6430,15 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
> case 0x8: /* External Abort */
> switch (cs->exception_index) {
> case EXCP_PREFETCH_ABORT:
> - env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_PRECISERR_MASK;
> - qemu_log_mask(CPU_LOG_INT, "...with CFSR.PRECISERR\n");
> + env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_IBUSERR_MASK;
> + qemu_log_mask(CPU_LOG_INT, "...with CFSR.IBUSERR\n");
> break;
> case EXCP_DATA_ABORT:
> env->v7m.cfsr[M_REG_NS] |=
> - (R_V7M_CFSR_IBUSERR_MASK | R_V7M_CFSR_BFARVALID_MASK);
> + (R_V7M_CFSR_PRECISERR_MASK | R_V7M_CFSR_BFARVALID_MASK);
> env->v7m.bfar = env->exception.vaddress;
> qemu_log_mask(CPU_LOG_INT,
> - "...with CFSR.IBUSERR and BFAR 0x%x\n",
> + "...with .PRECISERR and BFAR 0x%x\n",
> env->v7m.bfar);
> break;
> }
> --
> 2.7.4
>
>
