On 09/12/2017 01:13 PM, Peter Maydell wrote: > For v8M, the NVIC has a new set of registers per interrupt, > NVIC_ITNS<n>. These determine whether the interrupt targets Secure > or Non-secure state. Implement the register read/write code for > these, and make them cause NVIC_IABR, NVIC_ICER, NVIC_ISER, > NVIC_ICPR, NVIC_IPR and NVIC_ISPR to RAZ/WI for non-secure > accesses to fields corresponding to interrupts which are > configured to target secure state. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > + s->itns[startvec + i] = value & (1 << i); It probably doesn't matter, since a functioning C99 compiler will do this transformation during conversion to bool, but (value >> i) & 1. r~
