On 09/12/2017 01:14 PM, Peter Maydell wrote: > The ICSR NVIC register is banked for v8M. This doesn't > require any new state, but it does mean that some bits > are controlled by BFHNFNMINS and some bits must work > with the correct banked exception. There is also a new > in v8M PENDNMICLR bit. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/intc/armv7m_nvic.c | 45 ++++++++++++++++++++++++++++++++------------- > 1 file changed, 32 insertions(+), 13 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
