On 09/22/17 14:18, Mark Cave-Ayland wrote: > Whilst the underlying PCI bridge implementation supports 32-bit PCI IO > accesses, unfortunately they are truncated at the legacy 64K limit. > > Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > --- > hw/pci/pci_bridge.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c > index 17feae5..a47d257 100644 > --- a/hw/pci/pci_bridge.c > +++ b/hw/pci/pci_bridge.c > @@ -379,7 +379,8 @@ void pci_bridge_initfn(PCIDevice *dev, const char > *typename) > sec_bus->address_space_mem = &br->address_space_mem; > memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", > UINT64_MAX); > sec_bus->address_space_io = &br->address_space_io; > - memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", > 65536); > + memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", > + UINT32_MAX); > br->windows = pci_bridge_region_init(br); > QLIST_INIT(&sec_bus->child); > QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling); >
Based on the commit message, I assume this change is guest-visible. If so, should it be made dependent on a compat property, so that it doesn't cause problems with migration? Thanks, Laszlo
