Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20171004184325.24157-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v1 00/12] ARM v8.1 simd + v8.3 complex insns
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
d2c19ec997 target/arm: Decode aa32 armv8.3 2-reg-index
a347025424 target/arm: Decode aa32 armv8.3 3-same
2cd36cf971 target/arm: Decode aa64 armv8.3 fcmla
9cfb03f4ce target/arm: Decode aa64 armv8.3 fcadd
28d1be2ecd target/arm: Add ARM_FEATURE_V8_FCMA
c701cad8be target/arm: Decode aa32 armv8.1 two reg and a scalar
a461fab907 target/arm: Decode aa32 armv8.1 three same
c6e3f60eb7 target/arm: Decode aa64 armv8.1 scalar/vector x indexed element
62aae53003 target/arm: Decode aa64 armv8.1 three same extra
0ced82a183 target/arm: Decode aa64 armv8.1 scalar three same extra
e1a1d86d50 target/arm: Add ARM_FEATURE_V8_1_SIMD
506b895705 HACK: use objdump disas
=== OUTPUT BEGIN ===
Checking PATCH 1/12: HACK: use objdump disas...
Checking PATCH 2/12: target/arm: Add ARM_FEATURE_V8_1_SIMD...
Checking PATCH 3/12: target/arm: Decode aa64 armv8.1 scalar three same extra...
ERROR: Macros with complex values should be enclosed in parenthesis
#54: FILE: target/arm/advsimd_helper.c:27:
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q
total: 1 errors, 0 warnings, 227 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 4/12: target/arm: Decode aa64 armv8.1 three same extra...
Checking PATCH 5/12: target/arm: Decode aa64 armv8.1 scalar/vector x indexed
element...
Checking PATCH 6/12: target/arm: Decode aa32 armv8.1 three same...
Checking PATCH 7/12: target/arm: Decode aa32 armv8.1 two reg and a scalar...
Checking PATCH 8/12: target/arm: Add ARM_FEATURE_V8_FCMA...
Checking PATCH 9/12: target/arm: Decode aa64 armv8.3 fcadd...
Checking PATCH 10/12: target/arm: Decode aa64 armv8.3 fcmla...
Checking PATCH 11/12: target/arm: Decode aa32 armv8.3 3-same...
Checking PATCH 12/12: target/arm: Decode aa32 armv8.3 2-reg-index...
=== OUTPUT END ===
Test command exited with code: 1
---
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