This patch set does a few things. First, it switches the AMD CFI flash MMIO operations from the old MMIO API to the new one. Second, it enables 8-byte wide flash arrays. Finally, it adds flash interleaving using the "device-width" and "max-device-width" properties, using the same interface as pflash_cfi01.c. Much of the code was taken and adapted from that file.
Version 1 of the patch set changed the flash register function (and all usages), version 2 localizes changes to the pflash_cfi02.c file. Mike Nawrocki (1): Add 8-byte access, interleaving to AMD CFI devices hw/block/pflash_cfi02.c | 491 +++++++++++++++++++++++++++++++++--------------- 1 file changed, 337 insertions(+), 154 deletions(-) -- 2.14.2
