On Wed, Nov 29, 2017 at 01:05:22PM -0800, Prasad Singamsetty wrote: > Thanks Michael. Some comments below. > > On 11/28/2017 9:32 AM, Michael S. Tsirkin wrote: > > On Tue, Nov 14, 2017 at 06:13:50PM -0500, prasad.singamse...@oracle.com > > wrote: > > > From: Prasad Singamsetty <prasad.singamse...@oracle.com> > > > > > > The current implementation of Intel IOMMU code only supports 39 bits > > > iova address width. This patch provides a new parameter (x-aw-bits) > > > for intel-iommu to extend its address width to 48 bits but keeping the > > > default the same (39 bits). The reason for not changing the default > > > is to avoid potential compatibility problems > > > > You can change the default, just make it 39 for existing machine types. > > I think introducing a new machine type is not appropriate as this > is an implementation limitation for the existing machine type. > Currently q35 is the only machine type that supports intel-iommu. > And we want to retain the current default behavior for q35 to avoid > any new issues with live migration.
I guess "existing machine type" means e.g. pc-q35-2.11 and older ones, rather than creating another machine type in parallel with q35. So we can set 48 bits as default on upcoming pc-q35-2.12 machines, while keep the 39 bits on the old ones. Please refer to include/hw/compat.h. > > > > > > with live migration of > > > intel-iommu enabled QEMU guest. The only valid values for 'x-aw-bits' > > > parameter are 39 and 48. > > > > I'd rather make it a boolean then. > > Right. It seems Intel already has additional sizes supported so keeping > it as an integer seems better. Yes, considering that 5-level IOMMUs are coming (AFAIK). -- Peter Xu
