On 01/03/2018 06:53 PM, Alistair Francis wrote:
> On Wed, Jan 3, 2018 at 8:41 AM, Philippe Mathieu-Daudé <f4...@amsat.org>
> wrote:
>> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
>> ---
>> hw/timer/pxa2xx_timer.c | 13 +++++++++++--
>> 1 file changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
>> index 68ba5a70b3..cfea0a5e22 100644
>> --- a/hw/timer/pxa2xx_timer.c
>> +++ b/hw/timer/pxa2xx_timer.c
>> @@ -13,6 +13,7 @@
>> #include "sysemu/sysemu.h"
>> #include "hw/arm/pxa.h"
>> #include "hw/sysbus.h"
>> +#include "qemu/log.h"
>>
>> #define OSMR0 0x00
>> #define OSMR1 0x04
>> @@ -252,8 +253,12 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr
>> offset,
>> case OSNR:
>> return s->snapshot;
>> default:
>> + qemu_log_mask(LOG_UNIMP, "%s: unknown reg 0x%02" HWADDR_PRIx
>> + "\n", __func__, offset);
>> + break;
>> badreg:
>> - hw_error("pxa2xx_timer_read: Bad offset " REG_FMT "\n", offset);
>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: incorrect reg 0x%02" HWADDR_PRIx
>> + "\n", __func__, offset);
>
> It might just be my email display, but if these lines don't line up
> can you fix them?
My guess is your email display is correct but my eyes are tired :S
>
> Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com>
Thanks!
>
> Alistair
>
>> }
>>
>> return 0;
>> @@ -377,8 +382,12 @@ static void pxa2xx_timer_write(void *opaque, hwaddr
>> offset,
>> }
>> break;
>> default:
>> + qemu_log_mask(LOG_UNIMP, "%s: unknown reg 0x%02" HWADDR_PRIx " "
>> + "(value 0x%08" PRIx64 ")\n", __func__, offset, value);
>> + break;
>> badreg:
>> - hw_error("pxa2xx_timer_write: Bad offset " REG_FMT "\n", offset);
>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: incorrect reg 0x%02"
>> HWADDR_PRIx " "
>> + "(value 0x%08" PRIx64 ")\n", __func__, offset, value);
>> }
>> }
>>
>> --
>> 2.15.1
>>
>>
