On 02/07/2018 05:28 PM, Michael Clark wrote: > Holds the state of a heterogenous array of RISC-V hardware threads. > > Signed-off-by: Michael Clark <m...@sifive.com> > --- > hw/riscv/riscv_hart.c | 95 > +++++++++++++++++++++++++++++++++++++++++++ > include/hw/riscv/riscv_hart.h | 45 ++++++++++++++++++++ > 2 files changed, 140 insertions(+) > create mode 100644 hw/riscv/riscv_hart.c > create mode 100644 include/hw/riscv/riscv_hart.h
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
