On Tue, Jan 11, 2011 at 10:12:14PM +0000, Peter Maydell wrote:
> When translating, the VFP vector length and stride for this TB are encoded
> in the TB flags; the CPUState copies may be different and must not be used.
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> target-arm/translate.c | 10 +++++++---
> 1 files changed, 7 insertions(+), 3 deletions(-)
Reviewed-by: Aurelien Jarno <aurel...@aurel32.net>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 9e0b0b1..624a443 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -60,6 +60,8 @@ typedef struct DisasContext {
> int user;
> #endif
> int vfp_enabled;
> + int vec_len;
> + int vec_stride;
> } DisasContext;
>
> #if defined(CONFIG_USER_ONLY)
> @@ -2895,7 +2897,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext
> *s, uint32_t insn)
> rm = VFP_SREG_M(insn);
> }
>
> - veclen = env->vfp.vec_len;
> + veclen = s->vec_len;
> if (op == 15 && rn > 3)
> veclen = 0;
>
> @@ -2916,9 +2918,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext
> *s, uint32_t insn)
> veclen = 0;
> } else {
> if (dp)
> - delta_d = (env->vfp.vec_stride >> 1) + 1;
> + delta_d = (s->vec_stride >> 1) + 1;
> else
> - delta_d = env->vfp.vec_stride + 1;
> + delta_d = s->vec_stride + 1;
>
> if ((rm & bank_mask) == 0) {
> /* mixed scalar/vector */
> @@ -9083,6 +9085,8 @@ static inline void
> gen_intermediate_code_internal(CPUState *env,
> }
> #endif
> dc->vfp_enabled = ARM_TBFLAG_VFPEN(tb->flags);
> + dc->vec_len = ARM_TBFLAG_VECLEN(tb->flags);
> + dc->vec_stride = ARM_TBFLAG_VECSTRIDE(tb->flags);
> cpu_F0s = tcg_temp_new_i32();
> cpu_F1s = tcg_temp_new_i32();
> cpu_F0d = tcg_temp_new_i64();
> --
> 1.6.3.3
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
