On 02/19/2018 08:10 AM, Linus Walleij wrote:
On Sat, Feb 17, 2018 at 7:28 PM, Philippe Mathieu-Daudé <f4...@amsat.org> wrote:
On 02/17/2018 11:00 AM, Linus Walleij wrote:
The assignment of the SiI9022 at address 0x39 and the EDID
DDC I2C at address 0x50 is not strictly correct: the DDC I2C
is there all the time but in the actual component it only
appears once activated inside the SiI9022, so ideally it should
be added and removed to the bus by the SiI9022. However for this
purpose it works fine to just have it around.
This seems easier to just do it now rather than postpone :)

In your patch #2:

static void sii9022_realize(DeviceState *dev, Error **errp)
     I2CBus *bus;

     bus = I2C_BUS(qdev_get_parent_bus(dev));
     i2c_create_slave(bus, TYPE_I2CDDC, 0x50);
I tried an approach like this but the I2C_BUS() macro was not
publicly visible in any header file and trying to pry it out just
brought along a lot of refactoring in the i2c core.c file that
scared me away...

Has someone else fixed it already?

I have a patch that does this.  Well, it's a small cleanup patch and another
patch, but it's really no that bad.  I'll send it.


Linus Walleij

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