On Fri, Mar 02, 2018 at 10:43:23PM +0100, BALATON Zoltan wrote:
> Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>

Applied, and rebased so we don't get bisection breakage.

> ---
>  hw/ppc/ppc440_uc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
> index 4e2523a..976ab2b 100644
> --- a/hw/ppc/ppc440_uc.c
> +++ b/hw/ppc/ppc440_uc.c
> @@ -1050,6 +1050,9 @@ static void ppc460ex_pcie_realize(DeviceState *dev, 
> Error **errp)
>      case DCRN_PCIE1_BASE:
>          id = 1;
>          break;
> +    default:
> +        error_setg(errp, "invalid PCIe DCRN base");
> +        return;
>      }
>      snprintf(buf, sizeof(buf), "pcie%d-io", id);
>      memory_region_init(&s->iomem, OBJECT(s), buf, UINT64_MAX);

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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