FYI. SiFive is hosting a RISC-V hackathon in Portland at the Embedded Linux
Conference next week:
Date: Monday, March 12 – Wednesday, March 14
Time: 10:30am Monday – 1:00pm Wednesday
Location: Embedded Linux Conference, Hilton Portland Downtown, Skyline II,
QEMU is being featured as the preferred full system emulator for teams working
on the challenges:
The challenges are primarily hardware based however I am told there is an open
category for particularly creative outcomes. One of the challenges is to get a
browser up and running on the Linux capable HiFive Unleashed board, to run a
Linux capable SOC, and can tunnel PCIe over SiFive’s chiplink interface, as a
mezzanine on a Xilinx VC707 FPGA to Xilinx PCIe IP on the FPGA allowing the
board to run X.org OpenGL graphics with an ATI graphics card using the Open
Source Radeon Linux drivers on a completely RISC-V based Linux system (this
challenge is based on the U540 SOC or ‘sifive-u54’ in the RISC-V QEMU port).
The Open Source graphics setup apparently will be demoed at the SiFive booth
(Quake on RISC-V). There is also the HiFive1 E-series Arduino compatible board
with a challenge to implement a software solution to bitbang USB over GPIOs
(this challenge is based on the E310 SOC or ‘sifive-e31’ in RISC-V QEMU port).
This would allow the LoFive board to be programmed without requiring a
proprietary FTDI. The specs for the chips are all open and of course similar
models can be synthesised in FPGA using the freedom rocket-chip generator.
There will be lots of HiFive Unleashed boards, HiFive1 boards, and SiFive
Hardware engineers present. We’ll also have the freedom U Open Source
soft-cores running on FPGA. This is the hardware that we are trying to model in
the QEMU RISC-V port, and a large proportion of the HDL is Open Source. One of
the goals is an Open Source USB solution.
There is QEMU specific development that is relevant for both challenges.
Bringing up graphical framebuffer on the RISC-V port is probably a good idea
for the HiFive Unleashed challenge but would be relatively easy for an expert
QEMU hacker, however bringing up VirGL support in QEMU RISC-V would likely be
hard enough to qualify as a creative outcome that would benefit both the QEMU
and RISC-V ecosystem. Pragmatists may just run Xvnc using ssh, however that
doesn’t really benefit QEMU. There is also a need to add SiFive GPIO support to
the RISC-V QEMU port ‘sifive_e’ machine, so that we could use QEMU to test
user-space USB protocol stacks, for the HiFive1/LoFive challenge (however I’m
likely to be working on GPIO support in my day job, and the intent is more to
have fun than to get free work).
The idea of the hackathon is to get together Open Source software and hardware
folk and to have some fun hacking on software that is based on an Open Source
RISC-V stack from the chip all the way up.
Perhaps something creative might be beating the real hardware with a QEMU based
solution. I think this is relevant to the QEMU community because we could
benefit the RISC-V QEMU and Linux ports in the process. There is a really good
opportunity with an Open Source ISA and platform to re-define a clean slate set
of interfaces between the firmware and operating system, and QEMU is key
modelling platforms for full system emulation. We could even have a QEMU BOF.
Anyway, at minimum this is a call to any QEMU developers in the Portland area
who might be keen to meet up next week.
My focus will certainly be on benefiting QEMU, and i’m almost certainly going
to be hacking on QEMU during the hackathon.
P.S. We asked on IRC about posting to the list about this, and the consensus
amongst who was present, was that it would be relevant if the event could
benefit QEMU. I think it could…