Richard Henderson <richard.hender...@linaro.org> writes:
> On 03/16/2018 12:08 PM, Nikunj A Dadhania wrote:
>> @@ -1078,8 +1079,8 @@ struct CPUPPCState {
>> /* Altivec registers */
>> ppc_avr_t avr[32];
>> uint32_t vscr;
>> - /* VSX registers */
>> - uint64_t vsr[32];
>> + /* 32 (128bit)- VSX registers */
>> + ppc_avr_t vsr[32];
>
> Another thing that needs to happen is to make ppc_avr_t to be 16-byte aligned
> (this is documented in tcg-gvec-op.h, I believe).
>
> This is easily accomplished by adding QEMU_ALIGNED(16) to the first union
> member. And then you'd like to put vsr adjacent to avr so that you're not
> adding another alignment hole.
Sure, will do that.
Regards
Nikunj
