Hello, I'm looking at adding support for MicroBlaze extended addressing allowing 32bit cores to reach a 64-bit address space.
The ABI for MicroBlaze remains 32-bits. It's basically a PAE-like MMU extension + a new set of extended address Load/Store instructions for the non-MMU mode. I'm primarily looking to implement the non-MMU mode now but it's not entirely clear to me how to do this. It would be nice to avoid multiple builds of microblaze and keep the address size run-time selectable. One way I think of is to set: #define TARGET_VIRT_ADDR_SPACE_BITS 64 #define TARGET_VIRT_ADDR_SPACE_BITS 64 And use a helper with cpu_ld_ hacks to do 64-bit loads. If I set TARGET_LONG_BITS=64 I can avoid the helper hack but IIUC, now all load stores need to take TCGv_i64's which complicates things a little in the translator since we now need to "emulate" the 32bit mode (common-case) with 64-bit addresses (wraps and such). Also, I'm guessing I'd need to set TARGET_ABI32 to avoid breaking linux-user. Does someone have any good suggestions or opinion on what the right way is? Am I missing something? Cheers, Edgar