Richard Henderson <richard.hender...@linaro.org> writes:
> We incorrectly passed in the current rounding mode
> instead of float_round_to_zero.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Oops,
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
>
> Found while runnning SVE RISU tests; it should be visible with the
> right set of inputs to AdvSIMD RISU tests.
>
>
> r~
>
> ---
> fpu/softfloat.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 6e16284e66..b46dccc63e 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1486,8 +1486,8 @@ uint ## isz ## _t float ## fsz ## _to_uint ## isz ##
> _round_to_zero \
> (float ## fsz a, float_status *s) \
> { \
> FloatParts p = float ## fsz ## _unpack_canonical(a, s); \
> - return round_to_uint_and_pack(p, s->float_rounding_mode, \
> - UINT ## isz ## _MAX, s); \
> + return round_to_uint_and_pack(p, float_round_to_zero, \
> + UINT ## isz ## _MAX, s); \
> }
>
> FLOAT_TO_UINT(16, 16)
--
Alex Bennée
