On 04/19/2018 12:17 AM, Peter Maydell wrote:
> On 17 April 2018 at 23:12, Richard Henderson
> <richard.hender...@linaro.org> wrote:
>> In db432672, we allow wide inputs for operations such as add.
>> However, in 212be173 and 3774030a we didn't do the same for
>> compare and multiply.
>>
>> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
>
> Can we hit these asserts in the uses of tcg_gen_mul_vec
> and tcg_gen_cmp_vec currently in the aarch64 frontend, or
> is this only a problem for the not-yet-landed SVE code?
Only sve code -- it requires a VQ that is not a power of 2, e.g. 3.
> I notice that do_shifti() also has a
> tcg_debug_assert(at->base_type == type);
> Is that assert correct, or should it also be changed to >= ?
I think that one is correct. This assert is hit for something like
mul z3, z2, z1[0]
where we dup the scalar to our widest host vector width and then multiply. In
the case of VQ=3, the dup might be to v256, one v256 multiply, and one v128
multiply.
r~
