This fixes an issue when disassembling rv128 c.sqsp,
where the code erroneously fell through to c.swsp.
Cc: Palmer Dabbelt <pal...@sifive.com>
Cc: Sagar Karandikar <sag...@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbast...@mail.uni-paderborn.de>
Cc: Alistair Francis <alistair.fran...@wdc.com>
Cc: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Michael Clark <m...@sifive.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
disas/riscv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 2cecf0d8558d..7fd1019623ee 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -1470,8 +1470,9 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa isa)
if (isa == rv128) {
op = rv_op_c_sqsp;
} else {
- op = rv_op_c_fsdsp; break;
+ op = rv_op_c_fsdsp;
}
+ break;
case 6: op = rv_op_c_swsp; break;
case 7:
if (isa == rv32) {
--
2.7.0
