From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Setup MicroBlaze builds for 64bit addressing.
No functional change since the translator does not yet
emit 64bit addresses.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
---
configure | 1 +
target/microblaze/cpu.h | 6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 59f91ab3f9..5626499e99 100755
--- a/configure
+++ b/configure
@@ -6844,6 +6844,7 @@ case "$target_name" in
microblaze|microblazeel)
TARGET_ARCH=microblaze
bflt="yes"
+ echo "TARGET_ABI32=y" >> $config_target_mak
;;
mips|mipsel)
TARGET_ARCH=mips
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 215f42b384..b631b7dc4c 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -23,7 +23,7 @@
#include "qemu-common.h"
#include "cpu-qom.h"
-#define TARGET_LONG_BITS 32
+#define TARGET_LONG_BITS 64
#define CPUArchState struct CPUMBState
@@ -340,8 +340,8 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#define TARGET_PHYS_ADDR_SPACE_BITS 64
+#define TARGET_VIRT_ADDR_SPACE_BITS 64
#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU
--
2.14.1
