Hi Peter, Thank you! (And thank you Edgar, Alistair and Sai for reviewing!)
Best regards, Francisco On Thursday, 17 May 2018, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 3 May 2018 at 22:41, Francisco Iglesias <frasse.igles...@gmail.com> > wrote: > > Hi, > > > > The ZynqMP Soc contains two separate instances of a generic DMA, one > located in > > the FPD (full power domain) called GDMA and a second one located in the > LPD > > (low power domain) called ADMA. This patch series attempts to add > emulation > > support for these two DMAs on the ZynqMP board. The first patch in the > series > > adds a model of the ZynqMP generic DMA (the ZDMA). The second patch in > the > > series connects the two instances of the ZDMA, the GDMA and the ADMA, to > the > > ZynqMP board. > > > > Best regards, > > Francisco Iglesias > > > > Changelog: > > v2 -> v3 > > * Use sizeof(s->dsc_dst) as the memcpy length when loading dsc_dst. > > * Remove an unnecessary qemu_log. > > * Move the setting of DMA_DONE til after the DMA transfer while loop. > > * Add dsc_src and dsc_dst to vmstate_zdma. > > > > v1 -> v2 > > * Don't unpause the DMA channel if CONT is zero and clear CONT after > > unpausing. > > * Added 'state' to the vmstate_zdma. > > * Renamed defines and variables in 'xlnx-zynqmp: Connect the ZynqMP > GDMA and > > ADMA' to better reflect they are channels variables. > > Applied to target-arm.next, thanks. > > -- PMM >
