On Fri, May 18, 2018 at 05:13:27PM +0200, Marc-André Lureau wrote: > Hi > > On Thu, May 17, 2018 at 11:25 AM, Gerd Hoffmann <kra...@redhat.com> wrote: > > Signed-off-by: Gerd Hoffmann <kra...@redhat.com> > > --- > > Could you explain where the 0x80 offset comes from?
Pulled out of thin air. Standard pci cfg space header size is 0x40, so it must be between 0x40 and 0xff - sizeof(capability). And it must not overlap with other pci(e) capabilities (easy as this is the only one). That are the only constrains I'm aware of. cheers, Gerd
