On 05/22/2018 05:15 PM, Michael Clark wrote:
> + /* Suppress 'C' if next instruction is not aligned
> + TODO: this should check next_pc */
> + if ((val & RVC) && (GETPC() & ~3) != 0) {
> + val &= ~RVC;
> + }
This is checking the host PC, which is useless.
Isn't this backward anyway? Why would *setting* C require an aligned address?
Surely it's *clearing* C that would require an aligned address.
You can read the guest PC of the current instruction by doing
cpu_restore_state(cs, GETPC(), false);
xxx = env->pc;
In order to get the next pc, I guess you'd just need to add 4, since all of the
csr insns are not in the compact encoding space?
Alternately, to save the not insignificant amount of work that
cpu_restore_state does, and since all of the csr insns end the TB anyway, you
could move
tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn);
before the call to helper_csr*. If an exception is raised by the helper, this
store to PC will be overwritten by the existing cpu_restore_state in
do_raise_exception_err so that the correct PC value is seen on entry to
do_interrupt.
r~
