From: Aleksandar Markovic <amarko...@wavecomp.com>
v4->v5:
- patch 5 (Add CP0 BadInstrX) corrected to work for both 32-bit and
64-bit targets, and using correct tcg function
- patch 7 (Amend CP0 WatchHi) was removed from the series until it
is reimplemented in a better way
v3->v4:
- accepted suggestion on better format of bit definitions in patch 3
- fixed build errors caused by a mistake in patch 4
- removed spurious comments in patch 4
- added setting lower 16 bits to 0 in patch 5
- used proper email address for a reviewer in patch 7 commit message
v2->v3:
- replaced invalid @imgtec.com and @mips.com in "From:",,
"Signed-off-by:", "Reviewed-by:" lines with the most current
email addresses for a particular person
- fixed build errors that appeared because of a mistake during
integration
v1->v2:
- fixed recipient's email addresses
Maintenance issues, fixes, and improvements collected during recent
development. Some of them are related to the upcoming nanoMIPS changes.
Note: These patches are, of course, supposed to be applied AFTER the
code freeze.
Aleksandar Markovic (4):
target/mips: Update maintainer's email addresses
target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
target/mips: Update some CP0 registers bit definitions
target/mips: Avoid case statements formulated by ranges
Stefan Markovic (1):
target/mips: Add CP0 BadInstrX register
Yongbok Kim (2):
target/mips: Don't update BadVAddr register in Debug Mode
target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
.mailmap | 7 +-
MAINTAINERS | 9 +-
target/mips/cpu.h | 39 ++++---
target/mips/helper.c | 4 +-
target/mips/machine.c | 5 +-
target/mips/msa_helper.c | 4 +-
target/mips/op_helper.c | 12 +-
target/mips/translate.c | 279 ++++++++++++++++++++++++++++++++++++++---------
8 files changed, 278 insertions(+), 81 deletions(-)
--
2.7.4
