diff --git a/target/arm/translate.c b/target/arm/translate.c
index f845da7c63..655aa056d0 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -12878,7 +12878,7 @@ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
     DisasContext dc;
     const TranslatorOps *ops = &arm_translator_ops;
 
-    if (ARM_TBFLAG_THUMB(tb->flags)) {
+    if (ARM_TBFLAG_THUMB(tb->flags) || arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_M)) {
         ops = &thumb_translator_ops;
     }
 #ifdef TARGET_AARCH64