On 13 September 2018 at 05:31, Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> wrote: > This sounds familiar to me. I remember whilst working on the Mac > uninorth patches I couldn't quite figure out why a simple change to the > PCI bridge IO address space started to cause some accesses to fail: it > was because the guest was issuing a periodic read to an address without > a MemoryRegion which was now failing with MEMTX_ERROR rather than the > returning 0 which was the previous behaviour.
You may have been caught by changes in the handling of unmapped-region accesses: historically we did read-as-zero/write-ignored, which is some combination of "what x86 does" and the natural result of not having support for flagging bus errors up to the CPU emulation. Adding support for architectures that need bus errors to be reported probably meant a change in the default at some point. One thing we don't handle as cleanly as might be ideal is the case where architecturally the CPU supports bus faults but the bus in an SoC or board doesn't actually report unmapped accesses back to the CPU as bus faults. You can model that by adding a suitable io accessor to the relevant container MR, as you found, but it's a bit unobvious. thanks -- PMM
