From: Manish Jaggi <manish.ja...@cavium.com>
kvm_arm_is_invariant is added to return true if the register
is invariant. This patch also adds an array invariant_sys_regs
which is lookedup for invaraint register ids.
Currently this patch checks for only MIDR invaraint register.
Signed-off-by: Manish Jaggi <manish.ja...@cavium.com>
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index 4e91c11..35a0c38 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -220,6 +220,11 @@ int kvm_arch_init_vcpu(CPUState *cs)
return kvm_arm_init_cpreg_list(cpu);
}
+bool kvm_arm_is_invariant(struct kvm_one_reg *r)
+{
+ return false;
+}
+
typedef struct Reg {
uint64_t id;
int offset;
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index e0b8246..edaf2de 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -491,6 +491,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
return true;
}
+#define ARM_CPU_ID_MIDR 3, 0, 0, 0, 0
#define ARM_CPU_ID_MPIDR 3, 0, 0, 0, 5
int kvm_arch_init_vcpu(CPUState *cs)
@@ -549,6 +550,21 @@ int kvm_arch_init_vcpu(CPUState *cs)
return kvm_arm_init_cpreg_list(cpu);
}
+static uint64_t invariant_sys_regs[] = {
+ ARM64_SYS_REG(ARM_CPU_ID_MIDR),
+};
+
+bool kvm_arm_is_invariant(struct kvm_one_reg *r)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
+ if (invariant_sys_regs[i] == r->id)
+ return true;
+
+ return false;
+}
+
bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx)
{
/* Return true if the regidx is a register we should synchronize
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 863f205..a834f60 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -61,6 +61,13 @@ void kvm_arm_register_device(MemoryRegion *mr, uint64_t
devid, uint64_t group,
int kvm_arm_init_cpreg_list(ARMCPU *cpu);
/**
+ * kvm_arm_is_invariant
+ *
+ * Returns: true if r is invariant
+ */
+bool kvm_arm_is_invariant(struct kvm_one_reg *r);
+
+/**
* kvm_arm_reg_syncs_via_cpreg_list
* regidx: KVM register index
*
--
1.8.3.1
