On Sun, Oct 07, 2018 at 18:05:22 -0700, Richard Henderson wrote:
> Isolate the computation of an index from an address into a
> helper before we change that function.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
>
> Emilio, this should make your dynamic tlb sizing patch 1/6
> significantly smaller.
Nice! I'm adding this as patch 1 for v2. Had to fix the conflicts
with the .addr_write conversion to atomic_write, and also
fixed a few typos like the following:
> void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
> TCGMemOpIdx oi, uintptr_t retaddr)
> {
> - unsigned mmu_idx = get_mmuidx(oi);
> - int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
> - target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> + uintptr_t mmu_idx = get_mmuidx(oi);
> + uintptr_t index = tlb_index(env, mmu_idx, addr);
> + CPUTLBEntry *entry = tlb_entry(env, mmu_idx, index);
Should be tlb_entry(env, mmu_idx, addr)
Thanks,
Emilio
