This edition fixes a number of conflicts with master, and adds a few field definitions from ARMv8.5, courtesy of Philippe.
It also fixes a big think-o in a last-minute change to the sve system mode patch set that was applied to master today. That would be patch 1. Sorry for not testing the original more thoroughly. r~ Richard Henderson (10): target/arm: Fix aarch64_sve_change_el wrt EL0 target/arm: Define fields of ISAR registers target/arm: Convert v8 extensions from feature bits to isar tests target/arm: Align cortex-r5 id_isar0 target/arm: Fix cortex-a7 id_isar0 target/arm: Convert division from feature bits to isar0 tests target/arm: Convert jazelle from feature bit to isar1 test target/arm: Convert t32ee from feature bit to isar3 test target/arm: Convert sve from feature bit to aa64pfr0 test target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 test target/arm/cpu.h | 275 +++++++++++++++++++++++++++++++++--- target/arm/translate-a64.h | 22 +++ target/arm/translate.h | 20 +++ linux-user/aarch64/signal.c | 4 +- linux-user/elfload.c | 60 ++++---- linux-user/syscall.c | 10 +- target/arm/cpu.c | 65 +++++---- target/arm/cpu64.c | 66 +++++---- target/arm/helper.c | 29 ++-- target/arm/machine.c | 6 +- target/arm/op_helper.c | 6 +- target/arm/translate-a64.c | 145 ++++++++++--------- target/arm/translate.c | 48 +++---- 13 files changed, 538 insertions(+), 218 deletions(-) -- 2.17.1