On 17/10/2018 20:12, Sebastian Andrzej Siewior wrote: > On 2018-09-28 11:54:11 [-0300], Eduardo Habkost wrote: >> On Fri, Sep 28, 2018 at 12:43:19PM +0200, Sebastian Andrzej Siewior wrote: >>> Intel SDM says for CPUID function 0DH, sub-function 0: >>> >>> | • ECX enumerates the size (in bytes) required by the XSAVE instruction >>> for an >>> | XSAVE area containing all the user state components supported by this >>> | processor. >>> | • EBX enumerates the size (in bytes) required by the XSAVE instruction >>> for an >>> | XSAVE area containing all the user state components corresponding to >>> bits >>> | currently set in XCR0. >>> >>> Signed-off-by: Sebastian Andrzej Siewior <bige...@linutronix.de> >>> --- >>> target/i386/cpu.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c >>> index f24295e6e4bb7..00c18444c0bac 100644 >>> --- a/target/i386/cpu.c >>> +++ b/target/i386/cpu.c >>> @@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, >>> uint32_t count, >>> *ecx = xsave_area_size(x86_cpu_xsave_components(cpu)); >>> *eax = env->features[FEAT_XSAVE_COMP_LO]; >>> *edx = env->features[FEAT_XSAVE_COMP_HI]; >>> - *ebx = *ecx; >>> + *ebx = xsave_area_size(env->xcr0); >> >> Reviewed-by: Eduardo Habkost <ehabk...@redhat.com> > > ping
It's queued for my next pull request. Paolo
