Peter Maydell <peter.mayd...@linaro.org> writes:
> On 5 November 2018 at 16:24, Alex Bennée <alex.ben...@linaro.org> wrote: >> >> Peter Maydell <peter.mayd...@linaro.org> writes: >> >>> In do_ats_write() we construct a PAR value based on the result >>> of the translation. A comment says "S2WLK and FSTAGE are always >>> zero, because we don't implement virtualization". >>> Since we do in fact now implement virtualization, add the missing >>> code that sets these bits based on the reported ARMMMUFaultInfo. >>> >>> (These bits are named PTW and S in ARMv8, so we follow that >>> convention in the new comments in this patch.) >>> >>> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> >>> --- >>> target/arm/helper.c | 10 ++++++---- >>> 1 file changed, 6 insertions(+), 4 deletions(-) >>> >>> diff --git a/target/arm/helper.c b/target/arm/helper.c >>> index 43afdd082e1..dc849b09893 100644 >>> --- a/target/arm/helper.c >>> +++ b/target/arm/helper.c >>> @@ -2344,10 +2344,12 @@ static uint64_t do_ats_write(CPUARMState *env, >>> uint64_t value, >>> >>> par64 |= 1; /* F */ >> >> To aid readability, mainly for those not familiar like me, maybe: >> >> par64 |= 1; /* PAR_EL1.F == 1, failed translation */ > > That's in the existing code... I know, it was just a suggestion to help make it clearer there are two forms when you are reading the register definition. -- Alex Bennée