On Mon, 3 Dec 2018 at 20:38, Richard Henderson <richard.hender...@linaro.org> wrote: > > Post v8.3 bits taken from SysReg_v85_xml-00bet8. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > target/arm/cpu.h | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 656a96a8f8..79d58978f7 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -1249,7 +1249,7 @@ static inline void xpsr_write(CPUARMState *env, > uint32_t val, uint32_t mask) > #define HCR_TIDCP (1ULL << 20) > #define HCR_TACR (1ULL << 21) > #define HCR_TSW (1ULL << 22) > -#define HCR_TPC (1ULL << 23) > +#define HCR_TPCP (1ULL << 23)
We were using "TPC" here because that's what the 32-bit HCR register names the bit; but standardizing on the 64-bit HCR_EL2 names makes sense. thanks -- PMM
