On Thu, 13 Dec 2018 01:48:49 +0400
Marc-André Lureau <marcandre.lur...@redhat.com> wrote:
> Replace arm_cpu_post_init() instance callback by calling it from leaf
> classes, to avoid potential ordering issue with other post_init callbacks.
>
> Signed-off-by: Marc-André Lureau <marcandre.lur...@redhat.com>
> Suggested-by: Igor Mammedov <imamm...@redhat.com>
Reviewed-by: Igor Mammedov <imamm...@redhat.com>
> ---
> target/arm/cpu-qom.h | 3 +++
> target/arm/cpu.h | 2 ++
> target/arm/cpu.c | 30 ++++++++++++++++++++++++------
> target/arm/cpu64.c | 24 ++++++++++++++++++++----
> 4 files changed, 49 insertions(+), 10 deletions(-)
>
> diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
> index d135ff8e06..2049fa9612 100644
> --- a/target/arm/cpu-qom.h
> +++ b/target/arm/cpu-qom.h
> @@ -35,6 +35,8 @@ struct arm_boot_info;
>
> #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
>
> +typedef struct ARMCPUInfo ARMCPUInfo;
> +
> /**
> * ARMCPUClass:
> * @parent_realize: The parent class' realize handler.
> @@ -47,6 +49,7 @@ typedef struct ARMCPUClass {
> CPUClass parent_class;
> /*< public >*/
>
> + const ARMCPUInfo *info;
> DeviceRealize parent_realize;
> void (*parent_reset)(CPUState *cpu);
> } ARMCPUClass;
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 2a73fed9a0..84fba2b24b 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -884,6 +884,8 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
> return container_of(env, ARMCPU, env);
> }
>
> +void arm_cpu_post_init(Object *obj);
> +
> uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz);
>
> #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 60411f6bfe..68f65c15ba 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -734,7 +734,7 @@ static Property arm_cpu_pmsav7_dregion_property =
> static Property arm_cpu_initsvtor_property =
> DEFINE_PROP_UINT32("init-svtor", ARMCPU, init_svtor, 0);
>
> -static void arm_cpu_post_init(Object *obj)
> +void arm_cpu_post_init(Object *obj)
> {
> ARMCPU *cpu = ARM_CPU(obj);
>
> @@ -1442,8 +1442,10 @@ static void cortex_m33_initfn(Object *obj)
>
> static void arm_v7m_class_init(ObjectClass *oc, void *data)
> {
> + ARMCPUClass *acc = ARM_CPU_CLASS(oc);
> CPUClass *cc = CPU_CLASS(oc);
>
> + acc->info = data;
> #ifndef CONFIG_USER_ONLY
> cc->do_interrupt = arm_v7m_cpu_do_interrupt;
> #endif
> @@ -1940,11 +1942,11 @@ static void arm_max_initfn(Object *obj)
>
> #endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */
>
> -typedef struct ARMCPUInfo {
> +struct ARMCPUInfo {
> const char *name;
> void (*initfn)(Object *obj);
> void (*class_init)(ObjectClass *oc, void *data);
> -} ARMCPUInfo;
> +};
>
> static const ARMCPUInfo arm_cpus[] = {
> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
> @@ -2094,6 +2096,7 @@ static void arm_host_initfn(Object *obj)
> ARMCPU *cpu = ARM_CPU(obj);
>
> kvm_arm_set_cpu_features_from_host(cpu);
> + arm_cpu_post_init(ARM_CPU(obj));
> }
>
> static const TypeInfo host_arm_cpu_type_info = {
> @@ -2108,14 +2111,30 @@ static const TypeInfo host_arm_cpu_type_info = {
>
> #endif
>
> +static void arm_cpu_instance_init(Object *obj)
> +{
> + ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj);
> +
> + acc->info->initfn(obj);
> + arm_cpu_post_init(obj);
> +}
> +
> +static void cpu_register_class_init(ObjectClass *oc, void *data)
> +{
> + ARMCPUClass *acc = ARM_CPU_CLASS(oc);
> +
> + acc->info = data;
> +}
> +
> static void cpu_register(const ARMCPUInfo *info)
> {
> TypeInfo type_info = {
> .parent = TYPE_ARM_CPU,
> .instance_size = sizeof(ARMCPU),
> - .instance_init = info->initfn,
> + .instance_init = arm_cpu_instance_init,
> .class_size = sizeof(ARMCPUClass),
> - .class_init = info->class_init,
> + .class_init = info->class_init ?: cpu_register_class_init,
> + .class_data = (void *)info,
> };
>
> type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
> @@ -2128,7 +2147,6 @@ static const TypeInfo arm_cpu_type_info = {
> .parent = TYPE_CPU,
> .instance_size = sizeof(ARMCPU),
> .instance_init = arm_cpu_initfn,
> - .instance_post_init = arm_cpu_post_init,
> .instance_finalize = arm_cpu_finalizefn,
> .abstract = true,
> .class_size = sizeof(ARMCPUClass),
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 873f059bf2..f09dc6b20d 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -359,11 +359,11 @@ static void aarch64_max_initfn(Object *obj)
> }
> }
>
> -typedef struct ARMCPUInfo {
> +struct ARMCPUInfo {
> const char *name;
> void (*initfn)(Object *obj);
> void (*class_init)(ObjectClass *oc, void *data);
> -} ARMCPUInfo;
> +};
>
> static const ARMCPUInfo aarch64_cpus[] = {
> { .name = "cortex-a57", .initfn = aarch64_a57_initfn },
> @@ -447,14 +447,30 @@ static void aarch64_cpu_class_init(ObjectClass *oc,
> void *data)
> cc->gdb_arch_name = aarch64_gdb_arch_name;
> }
>
> +static void aarch64_cpu_instance_init(Object *obj)
> +{
> + ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj);
> +
> + acc->info->initfn(obj);
> + arm_cpu_post_init(obj);
> +}
> +
> +static void cpu_register_class_init(ObjectClass *oc, void *data)
> +{
> + ARMCPUClass *acc = ARM_CPU_CLASS(oc);
> +
> + acc->info = data;
> +}
> +
> static void aarch64_cpu_register(const ARMCPUInfo *info)
> {
> TypeInfo type_info = {
> .parent = TYPE_AARCH64_CPU,
> .instance_size = sizeof(ARMCPU),
> - .instance_init = info->initfn,
> + .instance_init = aarch64_cpu_instance_init,
> .class_size = sizeof(ARMCPUClass),
> - .class_init = info->class_init,
> + .class_init = info->class_init ?: cpu_register_class_init,
> + .class_data = (void *)info,
> };
>
> type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
