Epyc CPUs support NPT and NRIPSAVE features and KVM exposes these when present. Add them to EPYC and EPYC-IBPB cpu models.
Signed-off-by: Vitaly Kuznetsov <vkuzn...@redhat.com> --- - RFC part: I'm not sure when these features first appeared, we may want to modify some Opteron_* models too. --- target/i386/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 677a3bd5fb..0a10fbeccc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2843,6 +2843,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] = CPUID_6_EAX_ARAT, + .features[FEAT_SVM] = + CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE, .xlevel = 0x8000001E, .model_id = "AMD EPYC Processor", .cache_info = &epyc_cache_info, @@ -2891,6 +2893,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] = CPUID_6_EAX_ARAT, + .features[FEAT_SVM] = + CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE, .xlevel = 0x8000001E, .model_id = "AMD EPYC Processor (with IBPB)", .cache_info = &epyc_cache_info, -- 2.19.2