On 4/18/11, Aurelien Jarno <aurel...@aurel32.net> wrote: > On Thu, Apr 14, 2011 at 10:18:02AM +0400, Dmitry Eremin-Solenikov wrote: >> Basic implementation of DEC/Intel SA-1100/SA-1110 chips emulation. >> Implemented: >> - IRQs >> - GPIO >> - PPC >> - RTC >> - UARTs (no IrDA/etc.) >> - OST reused from pxa25x >> >> Everything else is TODO (esp. PM/idle/sleep!) - see the todo in the >> hw/strongarm.c >> >> V5: >> * syntax fixup >> >> V4: >> * use bitnames to access RTC and UART registers >> * drop unused casts >> * disable debug printfs in GPIO code >> >> V3: >> * fix the name of UART VMSD >> * fix RTSR reg offset >> * add SSP support >> >> V2: >> * removed all strongarm variants except latest >> * dropped unused casts >> * fixed PIC vmstate >> * fixed new devices created with version_id = 1 >> >> Signed-off-by: Dmitry Eremin-Solenikov <dbarysh...@gmail.com> >> --- >> Makefile.target | 1 + >> hw/strongarm.c | 1587 >> +++++++++++++++++++++++++++++++++++++++++++++++++++ >> hw/strongarm.h | 64 ++ >> target-arm/cpu.h | 3 + >> target-arm/helper.c | 9 + >> 5 files changed, 1664 insertions(+), 0 deletions(-) >> create mode 100644 hw/strongarm.c >> create mode 100644 hw/strongarm.h > > It seems we are slowly converging, and this is almost ready. See my > comments below.
I hope not to spam this ML with patches :) Will send V6 in a moment. -- With best wishes Dmitry