Philippe Mathieu-Daudé <phi...@redhat.com> writes:
> In the next commit we will move exception handling routines to
> v7m_helper, so this function will be called from 2 different
> files. Declare it inlined in the "internals.h" header.
>
> Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
> target/arm/helper.c | 19 -------------------
> target/arm/internals.h | 21 +++++++++++++++++++++
> 2 files changed, 21 insertions(+), 19 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index cf76010ea1..5d05db84d3 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -7611,25 +7611,6 @@ uint32_t arm_phys_excp_target_el(CPUState *cs,
> uint32_t excp_idx,
> return target_el;
> }
>
> -/*
> - * Return true if the v7M CPACR permits access to the FPU for the specified
> - * security state and privilege level.
> - */
> -static bool v7m_cpacr_pass(CPUARMState *env, bool is_secure, bool is_priv)
> -{
> - switch (extract32(env->v7m.cpacr[is_secure], 20, 2)) {
> - case 0:
> - case 2: /* UNPREDICTABLE: we treat like 0 */
> - return false;
> - case 1:
> - return is_priv;
> - case 3:
> - return true;
> - default:
> - g_assert_not_reached();
> - }
> -}
> -
> /*
> * What kind of stack write are we doing? This affects how exceptions
> * generated during the stacking are treated.
> diff --git a/target/arm/internals.h b/target/arm/internals.h
> index 04711b317a..1d15af3f8b 100644
> --- a/target/arm/internals.h
> +++ b/target/arm/internals.h
> @@ -891,6 +891,27 @@ static inline uint32_t v7m_sp_limit(CPUARMState *env)
> }
> }
>
> +/**
> + * v7m_cpacr_pass:
> + * Return true if the v7M CPACR permits access to the FPU for the specified
> + * security state and privilege level.
> + */
> +static inline bool v7m_cpacr_pass(CPUARMState *env,
> + bool is_secure, bool is_priv)
> +{
> + switch (extract32(env->v7m.cpacr[is_secure], 20, 2)) {
> + case 0:
> + case 2: /* UNPREDICTABLE: we treat like 0 */
> + return false;
> + case 1:
> + return is_priv;
> + case 3:
> + return true;
> + default:
> + g_assert_not_reached();
> + }
> +}
> +
> /**
> * aarch32_mode_name(): Return name of the AArch32 CPU mode
> * @psr: Program Status Register indicating CPU mode
--
Alex Bennée
