From: Stephen Checkoway <stephen.checko...@oberlin.edu>
When erasing the chip, use the typical time specified in the CFI table
rather than arbitrarily selecting 5 seconds.
Since the currently unconfigurable value set in the table is 12, this
means a chip erase takes 4096 ms so this isn't a big change in behavior.
Signed-off-by: Stephen Checkoway <stephen.checko...@oberlin.edu>
Message-Id: <20190426162624.55977-11-stephen.checko...@oberlin.edu>
Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com>
---
TODO check not zero
---
hw/block/pflash_cfi02.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index a3665da3b8..b2d37c33bb 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -617,9 +617,9 @@ static void pflash_write(void *opaque, hwaddr offset,
uint64_t value,
pflash_update(pfl, 0, pfl->chip_len);
}
set_dq7(pfl, 0x00);
- /* Let's wait 5 seconds before chip erase is done */
+ /* Wait the time specified at CFI address 0x22. */
timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (NANOSECONDS_PER_SECOND * 5));
+ (1ULL << pfl->cfi_table[0x22]) * SCALE_MS);
break;
case 0x30:
/* Sector erase */
--
2.20.1
