The IEEE6 test comes down to:
commit a15945d98d3a3390c3da344d1b47218e91e49d8b
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: Tue Feb 5 16:52:42 2019 +0000
target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
The {IOE, DZE, OFE, UFE, IXE, IDE} bits in the FPSCR/FPCR are for
enabling trapped IEEE floating point exceptions (where IEEE exception
conditions cause a CPU exception rather than updating the FPSR status
bits). QEMU doesn't implement this (and nor does the hardware we're
modelling), but for implementations which don't implement trapped
exception handling these control bits are supposed to be RAZ/WI.
This allows guest code to test for whether the feature is present
by trying to write to the bit and checking whether it sticks.
QEMU is incorrectly making these bits read as written. Make them
RAZ/WI as the architecture requires.
In particular this was causing problems for the NetBSD automatic
test suite.
Reported-by: Martin Husemann <mar...@netbsd.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-id: 20190131130700.28392-1-peter.mayd...@linaro.org
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https://bugs.launchpad.net/bugs/1836078
Title:
Regressions on arm-linux-gnueabihf target with some GCC tests
Status in QEMU:
In Progress
Bug description:
Hi,
After trying qemu master:
commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde
Merge: 68d7ff0 14f5d87
Author: Peter Maydell <email address hidden>
Date: Fri Jun 21 15:40:50 2019 +0100
even with the fix for https://bugs.launchpad.net/qemu/+bug/1834496,
I've noticed several regressions compared to qemu-3.1 when running the GCC
testsuite.
I'm attaching a tarball containing several GCC tests (binaries), needed
shared libs, and a short script to run all the tests.
All tests used to pass w/o error, but with a recent qemu, all of them
make qemu crash.
This was noticed with GCC master configured with
--target arm-none-linux-gnueabihf
--with-cpu cortex-a57
--with-fpu crypto-neon-fp-armv8
Thanks
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