Hello,
On Fri, Sep 6, 2019 at 11:22 PM Bin Meng <bmeng...@gmail.com> wrote:
>
> On Fri, Sep 6, 2019 at 11:09 PM Bin Meng <bmeng...@gmail.com> wrote:
> >
> > Commit a27bd6c779ba ("Include hw/qdev-properties.h less") wrongly
> > added "hw/hw.h" to sifive_prci.c and sifive_test.c.
> >
> > Another inclusion of "hw/hw.h" was later added via
> > commit 650d103d3ea9 ("Include hw/hw.h exactly where needed"), that
> > resulted in duplicated inclusion of "hw/hw.h".
> >
> > Fixes: a27bd6c779ba ("Include hw/qdev-properties.h less")
> > Signed-off-by: Bin Meng <bmeng...@gmail.com>
> > ---
> >
> > hw/riscv/sifive_prci.c | 1 -
> > hw/riscv/sifive_test.c | 1 -
> > 2 files changed, 2 deletions(-)
> >
>
> Sigh, I just realized that this patch has inter-dependencies with the
> following patch series:
>
> riscv: sifive_test: Add reset functionality
> http://patchwork.ozlabs.org/patch/1158526/
>
> and
>
> riscv: sifive_u: Improve the emulation fidelity of sifive_u machine
> http://patchwork.ozlabs.org/project/qemu-devel/list/?series=128443
>
> Thus cannot be applied cleanly on top of qemu/master.
>
> If I create this patch on qemu/master, that means the other 2 series
> needs to be rebased again.
>
I've included this single patch to my v8 version of "riscv: sifive_u:
Improve the emulation fidelity of sifive_u machine", to ease patch
inter-dependencies, so that the whole v8 series can be applied on
Palmer's RISC-V queue.
See http://patchwork.ozlabs.org/patch/1159111/
So, please ignore this single patch.
Regards,
Bin
