On 05/19/2011 08:55 AM, Avi Kivity wrote:
On 05/19/2011 04:50 PM, Anthony Liguori wrote:
But the i440fx doesn't register the VGA region. The PIIX3 (ISA bus)
does, so how does it know what the priority of that mapping is?
The PCI bridge also has a say, no?
For legacy VGA memory? That's a good question. I've always assumed
that legacy VGA memory is handled directly in the chipset by redirecting
writes to the first VGA adapter it encounters (which usually happens to
be the builtin one these days).
I'm not sure it's possible to have a VGA device behind a bridge that
also handles legacy VGA memory because the bridge pretty clearly can
only have BARs within a certain region of memory (based on the bridge's
config space).
Regards,
Anthony Liguori
(and it would be a VGA region over memory, not the other way around).
