Richard Henderson <richard.hender...@linaro.org> writes:
> Create a function to compute the values of the TBFLAG_A32 bits
> that will be cached, and are used by M-profile.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
> target/arm/helper.c | 45 ++++++++++++++++++++++++++++++---------------
> 1 file changed, 30 insertions(+), 15 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 4c65476d93..d4303420da 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11083,6 +11083,29 @@ static uint32_t rebuild_hflags_common_32(CPUARMState
> *env, int fp_el,
> return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
> }
>
> +static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el,
> + ARMMMUIdx mmu_idx)
> +{
> + uint32_t flags = 0;
> +
> + if (arm_v7m_is_handler_mode(env)) {
> + flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
> + }
> +
> + /*
> + * v8M always applies stack limit checks unless CCR.STKOFHFNMIGN
> + * is suppressing them because the requested execution priority
> + * is less than 0.
> + */
> + if (arm_feature(env, ARM_FEATURE_V8) &&
> + !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
> + (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
> + flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
> + }
> +
> + return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
> +}
> +
> static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
> ARMMMUIdx mmu_idx)
> {
> @@ -11168,7 +11191,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> }
> } else {
> *pc = env->regs[15];
> - flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
> +
> + if (arm_feature(env, ARM_FEATURE_M)) {
> + flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
> + } else {
> + flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
> + }
> +
> flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
> flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
> flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
> env->vfp.vec_stride);
> @@ -11204,20 +11233,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> }
> }
>
> - if (arm_v7m_is_handler_mode(env)) {
> - flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
> - }
> -
> - /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is
> - * suppressing them because the requested execution priority is less
> than 0.
> - */
> - if (arm_feature(env, ARM_FEATURE_V8) &&
> - arm_feature(env, ARM_FEATURE_M) &&
> - !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
> - (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
> - flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
> - }
> -
> if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
> FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) !=
> env->v7m.secure) {
> flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
--
Alex Bennée
