Hello, The interrupt presenters are created by a machine handler at the core level and are reseted independently. This is not consistent and it raises some issues when it comes to handle hot-plugged CPUs. These are reseted from the realize handler of the core and the presenters are not. This is less of an issue in XICS, although a zero MFFR could be a concern, but in XIVE, the OS CAM line is not set and this breaks the presenting algorithm. The current code has workarounds which need a global cleanup.
Extend the sPAPR IRQ backend with a new cpu_intc_reset() handler which will be called by the CPU reset handler and remove the XiveTCTX reset handler which is redundant. Set the OS CAM line when the interrupt presenter of the sPAPR core is reseted. This will also cover the case of hot-plugged CPUs. These changes do not address the root problem: the reset of the core at realize time which hides the fact that hot-plugged CPUs are not reseted. Anyhow, they do fix the presenter reset and remove a workaround of workaround in the case of XIVE. Thanks, C. Changes inv v2: - removed property - simplified reset handlers Cédric Le Goater (2): spapr: Introduce a interrupt presenter reset handler spapr/xive: Set the OS CAM line at reset include/hw/ppc/spapr_irq.h | 2 ++ include/hw/ppc/spapr_xive.h | 1 - include/hw/ppc/xics.h | 1 + include/hw/ppc/xive.h | 1 + hw/intc/spapr_xive.c | 25 ++++++++++--------------- hw/intc/xics.c | 8 ++------ hw/intc/xics_spapr.c | 7 +++++++ hw/intc/xive.c | 12 +----------- hw/ppc/spapr_cpu_core.c | 14 ++++++++++---- hw/ppc/spapr_irq.c | 14 ++++++++++++++ 10 files changed, 48 insertions(+), 37 deletions(-) -- 2.21.0
