Hi, On 2020-01-20 10:31, Alistair Francis wrote: > On Mon, Jan 6, 2020 at 2:59 AM Aurelien Jarno <aurel...@aurel32.net> wrote: > > > > On 2020-01-05 17:36, Aurelien Jarno wrote: > > > > diff --git a/target/riscv/csr.c b/target/riscv/csr.c > > > > index e0d4586760..2789215b5e 100644 > > > > --- a/target/riscv/csr.c > > > > +++ b/target/riscv/csr.c > > > > > > [ snip ] > > > > > > > @@ -307,6 +307,7 @@ static int write_mstatus(CPURISCVState *env, int > > > > csrno, target_ulong val) > > > > { > > > > target_ulong mstatus = env->mstatus; > > > > target_ulong mask = 0; > > > > + int dirty; > > > > > > > > /* flush tlb on mstatus fields that affect VM */ > > > > if (env->priv_ver <= PRIV_VERSION_1_09_1) { > > > > @@ -340,8 +341,9 @@ static int write_mstatus(CPURISCVState *env, int > > > > csrno, target_ulong val) > > > > > > > > mstatus = (mstatus & ~mask) | (val & mask); > > > > > > > > - int dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) | > > > > - ((mstatus & MSTATUS_XS) == MSTATUS_XS); > > > > + dirty = (riscv_cpu_fp_enabled(env) && > > > > + ((mstatus & MSTATUS_FS) == MSTATUS_FS)) | > > > > + ((mstatus & MSTATUS_XS) == MSTATUS_XS); > > > > mstatus = set_field(mstatus, MSTATUS_SD, dirty); > > > > env->mstatus = mstatus; > > > > > > This patch, and more precisely the above two hunks broke > > > qemu-system-riscv64. More precisely, when running a Debian sid system > > > inside QEMU, sshd hangs during key exchange. > > > > The problem is that at this stage, mstatus != env->status. Prior to that > > patch, dirty was computed exclusively on the new mstatus status, after > > the update by val. With this patch, riscv_cpu_fp_enabled() refers to the > > old value of mstatus. Therefore when FS is changed from "Off" (FS = 00) > > to "Dirty" (FS == 11), the SD bit is not set. > > Thanks for reporting this! > > Can you try this branch (it should be a PR to mainline QEMU soon) and > let me know if that fixes the issue? > > https://github.com/palmer-dabbelt/qemu/commits/for-master
Thanks for the patchset. I confirm this fixes the issue. Aurelien -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurel...@aurel32.net http://www.aurel32.net