On 2/11/20 9:37 AM, Peter Maydell wrote: > Add the 64-bit version of the "is this a v8.1 PMUv3?" > ID register check function, and the _any_ version that > checks for either AArch32 or AArch64 support. We'll use > this in a later commit. > > We don't (yet) do any isar_feature checks on ID_AA64DFR1_EL1, > but we move id_aa64dfr1 into the ARMISARegisters struct with > id_aa64dfr0, for consistency. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/cpu.h | 15 +++++++++++++-- > target/arm/cpu.c | 3 ++- > target/arm/cpu64.c | 6 +++--- > target/arm/helper.c | 12 +++++++----- > 4 files changed, 25 insertions(+), 11 deletions(-)
Normally we also read the value of the ISAR registers for KVM. I know these tests don't apply along these paths, but for consistency... Otherwise, Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
