On 2/14/20 9:51 AM, Peter Maydell wrote:
> The isar_feature_aa32_pan and isar_feature_aa32_ats1e1 functions
> are supposed to be testing fields in ID_MMFR3; but a cut-and-paste
> error meant we were looking at MVFR0 instead.
> 
> Fix the functions to look at the right register; this requires
> us to move at least id_mmfr3 to the ARMISARegisters struct; we
> choose to move all the ID_MMFRn registers for consistency.
> 
> Fixes: 3d6ad6bb466f
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
>  target/arm/cpu.h      |  14 +++---
>  hw/intc/armv7m_nvic.c |   8 ++--
>  target/arm/cpu.c      | 104 +++++++++++++++++++++---------------------
>  target/arm/cpu64.c    |  28 ++++++------
>  target/arm/helper.c   |  12 ++---
>  target/arm/kvm32.c    |  17 +++++++
>  target/arm/kvm64.c    |  10 ++++
>  7 files changed, 110 insertions(+), 83 deletions(-)

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


r~

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